{"id":801,"date":"2013-09-01T00:00:00","date_gmt":"2013-09-01T00:00:00","guid":{"rendered":"https:\/\/fir3netwp.gmsrrpobkbd.com\/2013\/09\/01\/f5-ltm-ram-cache\/"},"modified":"2023-01-15T23:01:56","modified_gmt":"2023-01-15T23:01:56","slug":"f5-ltm-ram-cache","status":"publish","type":"post","link":"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html","title":{"rendered":"F5 LTM &#8211; RAM Cache"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_65 counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<p class=\"ez-toc-title\">Table of Contents<\/p>\n<label for=\"ez-toc-cssicon-toggle-item-66265182f2165\" class=\"ez-toc-cssicon-toggle-label\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/label><input type=\"checkbox\"  id=\"ez-toc-cssicon-toggle-item-66265182f2165\"  aria-label=\"Toggle\" \/><nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#Introduction\" title=\"Introduction\">Introduction<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#What_is_Cached\" title=\"What is Cached ?\">What is Cached ?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#Configuration\" title=\"Configuration\">Configuration<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#Memory_Considerations\" title=\"Memory Considerations\">Memory Considerations<\/a><ul class='ez-toc-list-level-4' ><li class='ez-toc-heading-level-4'><ul class='ez-toc-list-level-4' ><li class='ez-toc-heading-level-4'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#Calculate\" title=\"Calculate\">Calculate<\/a><\/li><\/ul><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#Commands\" title=\"Commands\">Commands<\/a><ul class='ez-toc-list-level-4' ><li class='ez-toc-heading-level-4'><ul class='ez-toc-list-level-4' ><li class='ez-toc-heading-level-4'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#show_commands\" title=\"show commands\">show commands<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-4'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#delete_commands\" title=\"delete commands\">delete commands<\/a><\/li><\/ul><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#iRule_Commands\" title=\"iRule Commands\">iRule Commands<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\/#References\" title=\"References\">References<\/a><\/li><\/ul><\/nav><\/div>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"Introduction\"><\/span><strong>Introduction<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>RAM Cache is a feature that provides the ability to serve content to your clients directly from the memory of your F5 appliance.<br \/>\nThis benefits both client and server by reducing response latency and also server load.<\/p>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"What_is_Cached\"><\/span><strong>What is Cached ?<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Heres a summary,<\/p>\n<p>The following items <strong>are<\/strong> cached,<\/p>\n<ul>\n<li>All 200, 203, 206, 300, 301, and 410 responses to a GET request method by default.<\/li>\n<li>Other HTTP methods can be cached via the URI URI Include list or an iRule.<\/li>\n<\/ul>\n<p>The following items <strong>are not<\/strong> cached,<\/p>\n<ul>\n<li>Private data defined by <a href=\"http:\/\/net.tutsplus.com\/tutorials\/other\/http-headers-for-dummies\/\">cache control<\/a> headers<\/li>\n<li>HTTP methods HEAD, PUT, DELETE, TRACE, and CONNECT are not cached by default.<\/li>\n<\/ul>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"Configuration\"><\/span><strong>Configuration<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>RAM Cache is configured within the HTTP profile (Local Traffic \/ Profiles \/ Services \/ HTTP). This is then assigned to your Virtual Server via the dropdown &#8220;HTTP Profile&#8221;.<\/p>\n<ul style=\"list-style-type: circle;\">\n<li><strong>RAM Cache<\/strong>\u00a0 &#8211; Disables \/ enables the feature<\/li>\n<li><strong>Maximum Cache Size<\/strong> &#8211; The maximum size (in Megabytes) for RAM cache. When the maximum size is reached the oldest entries are removed first.<\/li>\n<li><strong>Maximum Entries<\/strong> &#8211; The maximum number of entries that can be in RAM Cache.<\/li>\n<li><strong>Maximum Age<\/strong> &#8211; The maximum period that the entry will be cached for. However this value is ignored if the &#8220;Cache Control Headers&#8221; specify that the entry has expired.<\/li>\n<li><strong>Minimum Object Size<\/strong> &#8211; Minimum size of item that can be cached.<\/li>\n<li><strong>Maximum Object Size<\/strong> &#8211; Maximum size of item that can be cached.<\/li>\n<li><strong>URI Caching<\/strong> &#8211; provides further granularity into what should\/shouldn&#8217;t be cached. The order of preference is Exclude List, Pin List, Include List.<\/li>\n<li style=\"margin-left: 30px;\"><strong>Pin List:<\/strong> Defines what items should be cached indefinitely (ignoring the expiry headers) that are not cached by default.<\/li>\n<li style=\"margin-left: 30px;\"><strong>Include List<\/strong>: Defines what items should be cached that are not cached by default.<\/li>\n<li style=\"margin-left: 30px;\"><strong>Exclude List:<\/strong> Based on the items that are cached by default, this list defines what items should not be excluded (i.e not cached)<\/li>\n<li><strong>Ignore Headers<\/strong> &#8211; Defines how &#8220;Cache-Control&#8221; headers should be ignored.<\/li>\n<li><strong>Insert Age Header<\/strong> &#8211; Defines whether a date and age headers should be added. The date provides the date on the F5 and the age provides the time the item has been in cache.<\/li>\n<li><strong>Aging Rate<\/strong> &#8211; Defines how quickly the system ages a cached item. 0 (slowest) \/ 10 (fastest)<\/li>\n<\/ul>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"Memory_Considerations\"><\/span><strong>Memory Considerations<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>By default the maximum cache size is 100MB. However due to CMP (Clustered Multi-Processing) this is per TMM instance. Meaning on a system with 2 cores this would relate to 200MB.<\/p>\n<p>Note : CMP basically runs a separate TMM instance on each CPU core which provides benefits in performance.<\/p>\n<p>Taking this in to consideration, the system allows for a maximum of 50% of free RAM to be assigned to RAM Cache.<\/p>\n<p class=\"codemulti\">[root@f5ltm:Active] config # b db show | grep MaxMemoryPercent<br \/>\nRamcache.MaxMemoryPercent = 50<\/p>\n<h4><span class=\"ez-toc-section\" id=\"Calculate\"><\/span><strong>Calculate<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h4>\n<p>Taking the above into account, to calculate the largest maximum cache size you would first check the amount of free RAM on the device by using the following command,<\/p>\n<p class=\"codemulti\">root@f5ltm(Active)(tmos)# show sys memory<\/p>\n<p>Sys::System Memory Information<br \/>\nMemory Used(bytes)\u00a0 Current\u00a0 Average\u00a0 Max(since 06\/08 10:13)<br \/>\n&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;<br \/>\nTotal Phys Memory\u00a0\u00a0\u00a0\u00a0\u00a0 3.8G\u00a0\u00a0\u00a0\u00a0 3.8G\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 3.8G<br \/>\nOS Used Memory\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 3.8G\u00a0\u00a0\u00a0\u00a0 3.8G\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 3.8G<br \/>\nTMM Alloc Memory\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 2.9G\u00a0\u00a0\u00a0\u00a0 2.9G\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 2.9G<br \/>\nTMM Used Memory\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 800M\u00a0\u00a0\u00a0\u00a0 801M\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 801M<\/p>\n<p>Here we can see that we have 2.1G free. Only 50% of this can be assigned to RAM Cache which is 1050MB. As we are basing our example on a 1600 LTM which has 2 cores, the maximum cache size would be 525Mb.<\/p>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"Commands\"><\/span><strong>Commands<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p><em>Note<\/em> : you will need to replace the name of your profile from PROF-RAMCACHE to whatever your profile is named.<\/p>\n<h4><span class=\"ez-toc-section\" id=\"show_commands\"><\/span><strong>show commands<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h4>\n<p>Here are the main show commands. The &#8216;show ltm profile ramcache &#8230;.&#8217; commands show the relating entries. Whereas the &#8216;show ltm profile http &#8230;.&#8217; command shows the statistics for the profile.<\/p>\n<p class=\"codemulti\">root@f5ltm(Active)(tmos)# show ltm profile ramcache PROF-RAMCACHE<br \/>\nroot@f5ltm(Active)(tmos)# show ltm profile ramcache PROF-RAMCACHE uri &lt;VALUE&gt;<br \/>\nroot@f5ltm(Active)(tmos)# show ltm profile ramcache PROF-RAMCACHE host &lt;VALUE&gt;<br \/>\nroot@f5ltm(Active)(tmos)# show ltm profile http PROF-RAMCACHE<\/p>\n<h4><span class=\"ez-toc-section\" id=\"delete_commands\"><\/span><strong>delete commands<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h4>\n<p>Below provides you with the commands required should you which to remove cached entries. The top command would be used to clear all entries for a given profile.<\/p>\n<p class=\"codemulti\">root@f5ltm(Active)(tmos)# delete ltm profile ramcache PROF-RAMCACHE<br \/>\nroot@f5ltm(Active)(tmos)# delete ltm profile ramcache PROF-RAMCACHE uri &lt;VALUE&gt;<br \/>\nroot@f5ltm(Active)(tmos)# delete ltm profile ramcache PROF-RAMCACHE host &lt;VALUE&gt; uri &lt;VALUE&gt;<\/p>\n<p><span class=\"uk-badge\">NOTE\u00a0<\/span>\u00a0 When viewing the RAMCache via TMSH entries using <span class=\"codeinline\">show ltm profile\u00a0PROF-RAMCACHE<\/span> will not include the details of any query strings within the URI field. To show the details of the query string within the URI use the command <span class=\"codeinline\">show ltm profile\u00a0<span class=\"codeinline\">PROF-RAMCACHE<\/span> all uri sales\/bananas<\/span><\/p>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"iRule_Commands\"><\/span><strong>iRule Commands<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>There are a number of iRule commands and events that can be used to control the RAM cache feature. These can be found at,<\/p>\n<ul>\n<li><a>https:\/\/devcentral.f5.com\/wiki\/iRules.cache.ashx<\/a><\/li>\n<li><a>https:\/\/devcentral.f5.com\/wiki\/iRules.CACHE__userkey.ashx<\/a><\/li>\n<\/ul>\n<p>However, out of all of the iRule CACHE commands the most useful is &#8216;CACHE::userkey &lt;key&gt;&#8217;. This provides the ability to add a key value to cached entries on the F5. This allows for multiple instances of an object to be cached. In turn providing greater granularity then what the HTTP header &#8216;<a href=\"https:\/\/www.fir3net.com\/Networking\/Protocols\/what-is-the-vary-http-header-used-for.html\">vary&#8217;<\/a> can offer, i.e storing different cache entries based on HTTP headers.<\/p>\n<p>Below is an example. Here if the HTTP path starts with \/cacti then a cached instance of the object is served and also stored using a key value based on either BLUE or YELLOW (i.e dependent on the value\u00a0 to the header &#8216;TEST&#8217;).<\/p>\n<p class=\"codemulti\"><span style=\"font-family: courier new,courier; color: black;\">when HTTP_REQUEST {<br \/>\nif { [HTTP::path] starts_with &#8220;\/cacti&#8221; } {<br \/>\nif { [HTTP::header value TEST] eq &#8220;yellow&#8221; } {<br \/>\nCACHE::userkey YELLOW }<br \/>\nelseif { [HTTP::header value TEST] eq &#8220;blue&#8221; } {<br \/>\nCACHE::userkey BLUE<br \/>\n}<br \/>\n}<br \/>\n}<\/span><\/p>\n<p>To confirm the number of cached entry variations within the cache the following command can be used &#8216;show ltm profile ramcache PROF-RAMCACHE host &lt;VALUE&gt;&#8217;.<\/p>\n<p class=\"codemulti\"><span style=\"font-family: courier new,courier; color: black;\">Host: 172.16.100.201<br \/>\nURI : \/cacti\/images\/auth_login.gif<br \/>\n&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8211;<br \/>\nSource Slot\/TMM\u00a0 0\/0<br \/>\nOwner Slot\/TMM\u00a0\u00a0 0\/0<br \/>\nRank\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 1<\/span><\/p>\n<p>\u00a0 Size (bytes)\u00a0\u00a0\u00a0\u00a0 21532<br \/>\nHits\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 0<br \/>\nReceived\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 2013-12-17 21:56:17<br \/>\nLast Sent\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 2013-12-17 21:56:17<br \/>\nExpires\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 2013-12-17 22:56:18<br \/>\nVary Type\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 none<br \/>\n<strong><span style=\"background-color: #ffff00;\">Vary Count\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 2<\/span><\/strong><br \/>\nVary User Agent\u00a0 none<br \/>\nVary Encoding\u00a0\u00a0\u00a0 none<br \/>\nTotal records returned: 1<\/p>\n<h2 class=\"h3\"><span class=\"ez-toc-section\" id=\"References\"><\/span><strong>References<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n<ul>\n<li><a href=\"http:\/\/support.f5.com\/kb\/en-us\/solutions\/public\/12000\/200\/sol12225.html\">The &#8216;ramcache.maxmemorypercent&#8217; variable controls memory allocation for the BIG-IP RAM Cache<\/a><\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Introduction RAM Cache is a feature that provides the ability to serve content to your clients directly from the memory of your F5 appliance. This benefits both client and server by reducing response latency and also server load. What is Cached ? Heres a summary, The following items are cached, All 200, 203, 206, 300, &#8230; <a title=\"F5 LTM &#8211; RAM Cache\" class=\"read-more\" href=\"https:\/\/www.fir3net.com\/Loadbalancers\/F5-BIG-IP\/f5-ltm-ram-cache.html\" aria-label=\"Read more about F5 LTM &#8211; RAM Cache\">Read more<\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[15],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v22.5 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>F5 LTM - RAM Cache - Fir3net<\/title>\n<meta name=\"description\" content=\"Introduction RAM Cache is a feature that provides the ability to serve content to your clients directly from the memory of your F5 appliance. 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